ID:25228 Verilog HDL warning at <location>: '<string>[<number>]' might have mixed concurrent and procedural assignment

CAUSE: Quartus Prime Synthesis generated the specified warning message for the specified location in a Design File.

ACTION: No action is required. To remove the warning, address the issue identified by the message text. A future version of the Quartus Prime software will provide more extensive Help for this warning message.