HRR-10101: Asynchronous Clears (Deprecated)

Description

Asynchronous clear signals always prevent the Intel Quartus Prime Pro Edition software from retiming paths in designs targeting the Intel Hyperflex architecture, limiting the design operation speed.

Recommendation

Remove the asynchronous clear if the circuit naturally resets when the reset is held long enough to reach a steady-state equivalent of a full reset.

Severity

Medium

Device Family

  • Intel® Agilex™
  • Intel® Stratix® 10