In the design contained in the following diagram, the input pin pin_name feeds the reset ports of inst, inst_1, and prime.
The Design Assistant reports pin_name violates the External reset should be synchronized using two cascaded registers (R102) rule. Suppressing the rule for the pin_name pin suppresses the rule for the nodes at the same hierarchical level, as well as those at a lower hierarchical level. The node prime is a register at the same hierarchical level as pin_name, while the nodes inst and inst_1 are registers in a different hierarchy, and do not require violation reporting for the purposes of this example. In order to have a rule violation report on prime, you should suppress the rule for the related nodes inst and inst_1.